Product Summary
The MPC8247ZQTIEA is a 13μm (HiP7) member of the PowerQUICC II family of integrated communications processors. It includes on a single chip a 32-bit PowerPC core that incorporates memory management units (MMUs) and instruction and data caches and that implements the PowerPC instruction set; a modified communications processor module (CPM); and an integrated security engine (SEC).
Parametrics
Absolute maximum ratings: (1)Core supply voltage, VDD: –0.3 – 2.25 V; (2)PLL supply voltage, VCCSYN: –0.3 – 2.25 V; (3)I/O supply voltage, VDDH: –0.3 – 4.0 V; (4)Input voltage, VIN: GND(–0.3) – 3.6 V; (5)Junction temperature, Tj: 120 ℃; (6)Storage temperature range, TSTG: (–55) – (+150) ℃.
Features
Features: (1)Dual-issue integer (G2_LE) core: A core version of the MPC603e microprocessor; System core microprocessor supporting frequencies of 266-400 MHz; Separate 16-Kbyte data and instruction caches: Four-way set associative, Physically addressed, LRU replacement algorithm; PowerPC architecture-compliant memory management unit (MMU); Common on-chip processor (COP) test interface; Supports bus snooping for cache coherency; Floating-point unit (FPU) supports floating-point arithmetic; Support for cache locking; (2)Low-power consumption; (3)Separate power supply for internal logic (1.5 V) and for I/O (3.3 V); (4)Separate PLLs for G2_LE core and for the communications processor module (CPM): G2_LE core and CPM can run at different frequencies for power/performance optimization; Internal core/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 4.5:1, 5:1, 5.5:1, 6:1, 7:1, and 8:1 ratios; Internal CPM/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ,and 8:1 ratios; (5)64-bit data and 32-bit address 60x bus.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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MPC8247ZQTIEA |
Freescale Semiconductor |
Microprocessors (MPU) PQ27E A W/O TALITOS |
Data Sheet |
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