Product Summary
The UPD42280V-30 is a high-speed field buffer equipped with a memory of 256K words × 8bit (262, 224 ×8bit configuration. The high-speed and the low power consumption are realized in CMOS dynamic circuit. The UPD42280V-30 consists of FIFO (First In First Out) configuration, and the write/read operations are possible asynchronously and simultaneously.
Parametrics
UPD42280V-30 maximum ratings: (1)Operational Power Supply: –1.0 to +7.0 V; (2)Pin Voltage:–1.0 to VDD +0.5 (7.0 V or less) V; (3)Output Current: ±20 mA; (4)Operating Ambient Temperature: –20 to +70 ℃; (5)Storage Temperature:–55 to +125 ℃.
Features
UPD42280V-30 features: (1)256K words × 8 bit FIFO configuration; (2)Write/read operations are possible asynchronously and simultaneously; (3)Reset is possible apart from write/read address (real time reset); (4)Self refresh function incorporated; (5)Output enable; (6)All I/O TTL compatible.
Diagrams
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