(China (Mainland))
Product Summary
The Altera’s EPF10K20RC208-3 device is the industry’s first embedded PLD. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions. With up to 250,000 gates, the EPF10K20RC208-3 provides the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device. The EPF10K20RC208-3 is reconfigurable, which allows 100% testing prior to shipment. As a result, the designer is not required to generate test vectors for fault coverage purposes. Additionally, the designer does not need to manage inventories of different ASIC designs; EPF10K20RC208-3 can be configured on the board for the specific functionality required.
Parametrics
EPF10K20RC208-3 absolute maximum ratings: (1)Supply voltage: –2.0 to 7.0 V With respect to ground; (2)DC input voltage: –2.0 to 7.0 V; (3)DC output current, per pin: –25 to 25 mA; (4)Storage temperature: –65 to 150 ℃; (5)Ambient temperature: –65 to 135 ℃; (6)Junction temperature: 150 ℃.
Features
EPF10K20RC208-3 features: (1)The industry’s first embedded programmable logic device (PLD) family, providing System-on-a-Programmable-Chip (SOPC) integration: Embedded array for implementing megafunctions, such as efficient memory and specialized logic functions, Logic array for general logic functions; (2)High density: 10,000 to 250,000 typical gates, Up to 40,960 RAM bits; 2,048 bits per embedded array block (EAB), all of which can be used without reducing logic capacity.
Diagrams
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 EPF10K20RC208-3 |
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IC FLEX 10K FPGA 20K 208-RQFP |
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EPF10K20RC208-3N |
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IC FLEX 10K FPGA 20K 208-RQFP |
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