Product Summary
The XC2S50-5FGG256C is a superior alternative to mask-programmed ASIC. The XC2S50-5FGG256C avoids the initial cost, lengthy development cycles, and inherent risk of conventional ASICs. Also, the programmability permits design upgrades in the field with no hardware replacement necessary (impossible with ASICs).
Parametrics
XC2S50-5FGG256C maximum ratings: (1)Supply voltage relative to GND(2): –0.5 3.0 V; (2)Supply voltage relative to GND(2): –0.5 4.0 V; (3)Input reference voltage: –0.5 3.6 V; (4)Input voltage relative to GND(3): 5V tolerant I/O(4), –0.5 to 5.5 V; No 5V tolerance(5), –0.5 to VCCO+0.5 V; (5)Voltage applied to 3-state output: 5V tolerant I/O(4), –0.5 to 5.5 V; No 5V tolerance(5), –0.5 to VCCO+0.5 V; (6)Storage temperature: -65 to +150℃; (7)Junction temperature: +125 ℃.
Features
XC2S50-5FGG256C features: (1)Second generation ASIC replacement technology; (2)Densities as high as 5,292 logic cells with up to 200,000 system gates; (3)Fully PCI compliant; (4)Low-power segmented routing architecture; (5)Full readback ability for verification/observability; (6)Dedicated carry logic for high-speed arithmetic; (7)Efficient multiplier support; (8)Cascade chain for wide-input functions; (9)Abundant registers/latches with enable, set, reset; (10)Four dedicated DLLs for advanced clock control; (11)Versatile I/O and packaging; (12)Core logic powered at 2.5V and I/Os powered at 1.5V, 2.5V, or 3.3V.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||
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XC2S50-5FGG256C |
IC SPARTAN-II FPGA 50K 256-FBGA |
Data Sheet |
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Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||
XC2S100 |
Other |
Data Sheet |
Negotiable |
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XC2S100-5FG256C |
IC FPGA 2.5V 600 CLB'S 256-FBGA |
Data Sheet |
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XC2S100-5FG256I |
IC FPGA 2.5V I-TEMP 256-FBGA |
Data Sheet |
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XC2S100-5FG456C |
IC FPGA 2.5V 600 CLB'S 456-FBGA |
Data Sheet |
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XC2S100-5FG456I |
IC FPGA 2.5V I-TEMP 456-FBGA |
Data Sheet |
Negotiable |
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XC2S100-5FGG256C |
IC SPARTAN-II FPGA 100K 256-FBGA |
Data Sheet |
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